October 6, 2026 By BJETECH Off

How to Program Xilinx FPGA with a USB JTAG Programmer

Programming a Xilinx FPGA over JTAG is a short, repeatable procedure: connect a USB JTAG programmer between your PC and the board’s JTAG header, let the Xilinx toolchain detect the chain, and download the bitstream. This guide walks the whole path — the hardware you need, the wiring, and the exact steps in both Vivado and ISE.

What you need

  • A USB JTAG programmer for Xilinx — the cable that sits between your PC and the target board.
  • The right adapter for your header — boards ship with 14-pin 2 mm, 10-pin 2 mm or 10-pin 2.54 mm JTAG headers, and they are not interchangeable.
  • A powered target board. JTAG does not power the target; the FPGA must already have its I/O and JTAG banks supplied.
  • Xilinx Vivado (2015 or later) or ISE 13/14, installed and licensed.
  • The bitstream you built for that device (.bit).

Why four wires are enough

JTAG is a standardised serial interface defined by IEEE 1149.1. It uses four signals:

  • TCK — the clock, driven by the programmer.
  • TMS — the state machine control line.
  • TDI — data into the device.
  • TDO — data out of the device.

Because the interface is standard, any compliant programmer can talk to any compliant device. What varies between cables is the voltage they drive, the connectors they offer and how well they are protected — not the protocol.

Step 1 — connect the programmer

  1. Fit the adapter that matches your board’s JTAG header. Check the header pitch before you push — a 2 mm connector forced onto a 2.54 mm header bends pins.
  2. Check the target’s JTAG I/O voltage against the programmer’s range. Xilinx devices commonly run JTAG I/O at 1.5 V to 3.3 V; a programmer that covers 1.5 V to 5.0 V DC will handle the usual cases.
  3. Power the target board before you expect the toolchain to see anything.
  4. Plug the programmer into a USB port — directly, not through an unpowered hub.

Step 2 — let the toolchain find the chain (Vivado)

  1. Open Vivado and go to the Hardware Manager.
  2. Click Open Target → Auto Connect.
  3. If the chain is healthy, Vivado enumerates the devices by name and shows the part numbers it found.

On Linux you may need to install the cable drivers that ship with Vivado — they are not installed by default. On Windows they are set up by the installer. If Auto Connect returns nothing, that is the first thing to check.

Step 2 (alternative) — ISE and iMPACT

  1. Launch iMPACT.
  2. Create a new project and choose Boundary Scan.
  3. Use Auto Assign, or add devices manually if you already know the chain order.

Step 3 — download the bitstream

  • In Vivado: right-click the device in the Hardware Manager and choose Program Device, then point it at your .bit file.
  • In ISE: assign the .bit to the device in iMPACT and press Program.

For a configuration-only download the bitstream lives in volatile memory and is lost at power-off. If you need the design to survive a power cycle, program the configuration flash as well — that is a separate step in the same toolchain.

When it doesn’t work

  • “No devices detected” — check, in this order: target powered, adapter seated, JTAG voltage within range, cable drivers installed, USB port working.
  • The wrong device appears in the chain — usually a pinout or ordering problem. Verify TDI and TDO are not swapped, and that the chain order in the tool matches the physical order on the board.
  • It works in Vivado but not ISE — the two toolchains use different driver stacks. A cable that works in one is not automatically installed for the other.
  • Intermittent failures on a long ribbon cable — shorten the cable, or lower TCK in the tool’s cable settings.

The hardware this guide was written around

We make a USB JTAG programmer for Xilinx FPGAs — USB 2.0 High Speed, a 1.5 V to 5.0 V target range, overcurrent and ESD protection, and a multi-connector adapter board so you can attach it to the common headers without hunting for an adapter. It works with ISE 13/14 and Vivado.

Where to go next

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