Xilinx JTAG Programmer for Vivado
Vivado talks to a target board through the Hardware Manager, and the Hardware Manager talks to whatever JTAG cable is plugged in. That layer is thinner than most people expect — which is why the same cable can work perfectly in Vivado and do nothing at all in ISE, and why “device not found” is almost always a driver or wiring problem rather than a broken board.
What Vivado needs from a JTAG programmer
Vivado does not require a vendor-branded cable. It requires a cable it can enumerate through its own driver stack. In practice that means:
- A USB device the OS recognises — the cable must enumerate cleanly before Vivado is even involved.
- Cable drivers installed. On Windows the Vivado installer handles this. On Linux they are a separate, manual step.
- JTAG I/O voltage that matches the target. Xilinx devices typically use 1.5 V to 3.3 V on their JTAG banks. A cable covering 1.5 V to 5.0 V DC covers the range you will meet.
- The right physical connector for the board’s header.
Installing the cable drivers (this is the step people skip)
On Linux, Vivado ships the drivers but does not install them. Run the driver installation script from the Vivado installation directory, then reconnect the cable. Until you do, the Hardware Manager will report that no hardware server can see a cable, even though the device appears in lsusb.
On Windows the drivers are installed with Vivado. If you move the cable to a machine without Vivado, install the standalone cable drivers rather than assuming the cable has failed.
The Vivado workflow, end to end
- Open Hardware Manager from the Flow Navigator.
- Open Target → Auto Connect. Vivado scans the JTAG chain and lists every device it finds, in chain order.
- Confirm the device. If the part number Vivado reports is not the part on your board, stop and fix the chain before programming — writing a bitstream to the wrong device is a good way to waste an afternoon.
- Program Device. Right-click the device, choose Program Device, select the
.bitfile, and let it run.
Common Vivado JTAG errors, and what they actually mean
- “No hardware targets available” — Vivado cannot see a cable at all. Driver not installed, cable not enumerated, or the hardware server is pointing at the wrong host.
- “There are no debug cores” — the cable and chain are fine; the design in the FPGA simply has no ILA/debug core in it. This is not a cable fault.
- The device appears but the IDCODE does not match — wrong part selected, or the chain order in the tool does not match the physical chain.
- Programming fails partway — usually signal integrity: a long ribbon cable, a noisy supply, or a TCK rate higher than the wiring supports. Lower the TCK frequency in the cable settings and retry.
- It worked yesterday — check the target’s JTAG voltage rail first. A bank that lost power looks exactly like a broken cable.
The cable we use
Our own cable is the BJ-JTAG-1: a USB 2.0 High Speed JTAG programmer with a 1.5 V to 5.0 V target range, overcurrent protection, ESD protection on the I/O, and a multi-connector adapter board covering 14-pin 2 mm, 10-pin 2 mm and 10-pin 2.54 mm headers. It is supported by Vivado and ISE 13/14 out of the box.
Related
- How to program a Xilinx FPGA over JTAG — the full walkthrough, including the ISE path.
- Choosing a Xilinx USB JTAG programmer — what to check before you buy.
